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Technical Insight

Magazine Feature
This article was originally featured in the edition:
Issue 2 2024

Enabling test automation in new power electronics reliability


Test automation is critical for optimizing reliability testing of power semiconductor devices during all stages from R&D to Manufacturing.

By Andrea Vinci, Senior Technical Marketing Manager at Tektronix.

There is no such thing as a univocal meaning and definition for “reliability” testing. The definition I like the most is this one: a methodology to discover how to improve product quality, enabling you to verify whether your device can withstand all possible stresses it will face once marketed into a customer’s application.

Figure 1: Semiconductor Product Development Phases

There are several development stages where reliability testing is critical: the R&D (Research and Development) phase, the pre-production (small quantities) phase, and in the mass production phase. In R&D, it is important to ensure that the characteristics and reliability defined in the design phase are met. In Pre-Production, the mass production line is used in limited lot sizes to evaluate and exclude problems before mass production commences.

The Bathub Plot

Ask reliability engineers to draw a function on a graph, and they will certainly come back with a bathtub curve like the one in Figure 2; the curve depicts a number of temporal regions for device failures.

Figure 2: The Bathtub Plot

Depending on the product lifecycle stage, reliability tests can present different challenges, methodologies, intrinsic constraints. Mainly, they will reveal different failure modes. You refer to an “extrinsic” reliability indicator when you test robustness against failures related to defectivity and process variability, causes that are external to the real capabilities of the design and materials. You refer to an “intrinsic” reliability of the compound semiconductor when the failure is related to how the component is designed (device structure, materials, and their wear out).

In summary, devices need to be stressed to failure and failure modes, analyzed as well as categorized as either extrinsic (early life failure) or intrinsic (wear-out failure). When you will have fixed the extrinsic failure causes, then primary failures will be due to intrinsic sources; this is when you need to model how the wear-out occurs. The degradation model will help you to predict lifetime and failure rate.

We all agree it is really not possible to wait years to study how a new technology-based compound semiconductor device can fail. To accelerate a potential failure mechanism, an enhanced stress is applied to devices, which, in the case of WBG power semiconductor devices, can mean stressing current, voltage, temperature, humidity, mechanical vibrations etc.Applying specific degradation models is the way to predict failure rates under stated stress conditions and lifetimes.