Info
Info
News Article

Imec Overcomes Fundamental Operation Challenge For Voltage-Controlled Magnetic Random-Access Memories (RAM)

News

Figures of merit for the VCMA MRAM device. The graph shows distributions of the fundamental parameters for the baseline devices, with Δ = 54, VCMA coefficient = 35.2fJ/Vm and TMR = 246% in median.

This week, at the 2020 Symposia on VLSI Technology and Circuits, imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, presents a deterministic write scheme for voltage-controlled magnetic anisotropy

(VCMA) magnetic random access memories (MRAMs), obviating the need for pre-reading the device before writing. This significantly improves the write duty cycle of the memory, enabling ns-scale write speeds. As a second improvement, a manufacturable solution for external-field-free VCMA switching operation was demonstrated. Both innovations address fundamental write operation challenges for VCMA MRAMs, making them viable candidates for future high-performance low-power memory applications.

Voltage-controlled MRAM operation has recently been introduced to bring down the power consumption of spin-transfer-torque MRAM (STT-MRAM) devices - which is a class of non-volatile, high-density, high-speed memories. While writing STT-MRAM memory cells is performed by means of a current (injected perpendicular into a magnetic tunnel junction), VCMA MRAM uses an electric field (hence, a voltage) for its write operation - which is far less energy consuming. Two basic components are required to switch from the parallel (P) to the antiparallel state (AP) (or vice

versa): an electric field (across the tunnel barrier) to remove the energy barrier, and an external in-plane magnetic field for the actual VCMA switching.

Imec has now solved two fundamental operation challenges which have so far limited the write speed and manufacturability of VCMA MRAMs, respectively. The slow write operation relates to the unipolar nature of the VCMA MRAM device: the same polarity of write pulse is needed to transition from the parallel to the anti-parallel (P-AP) state as to switch from anti-parallel to parallel (AP-P) state. Therefore, the memory cell needs to be ‘pre-read' to know its state before writing - a sequence which significantly slows down the write operation. Imec has introduced a unique deterministic VCMA write concept that avoids the need for pre-reading: distinct threshold voltages are introduced for the A-AP and AP-P transitions by creating an offset in the energy barrier.

This offset is realized by implementing a small (e.g. 5mT) offset magnetic field (Bz,eff) in the VCMA stack design.

As a second improvement, imec embedded a magnetic hardmask on top of the magnetic tunnel junction. This eliminates the need for an external magnetic field during VCMA switching, improving the device's manufacturability without degrading its performance.

The devices were fabricated using imec's 300mm state-of-the-art technology infrastructure, proving their compatibility with CMOS technology. Reliable 1.1GHz (or ns-scale speed) external-magnetic-field-free VCMA switching was demonstrated with only 20fJ write energy. A high tunnel magnetoresistance of 246% and an endurance of more than 1010 have been achieved. Gouri Sankar Kar, Program Director at imec: “These characteristics bring VCMA MRAM performance beyond STT-MRAM operation, making the devices ideal candidates for high-performance, low-power and high-density memory application - serving advanced computational needs or analog compute-in-memory applications.”

Verkor To Ramp Up Battery Cell Production In Southern Europe
Dirk Knorr And Josef Wörner Take Over Management At Würth Elektronik EiSos GmbH & Co. KG
Navitas GaN IC Drives Latest OPPO Fast Chargers
BrightLoop And GaN Systems Announce Partnership
Groupe PSA Strengthens Its Electric Offensive With New EVMP Platform
Signal Transmission With Reliable Galvanic Isolation
Hua Hong Semiconductor Relies On '8-inch + 12-inch' Strategy To Accelerate Development In IGBT Market
VINCOTECH Announces CEO Transition
Delta Uses ON Semi SiC Power Modules
FEV Launches New Solutions For High Voltage Battery Testing
Tektronix Enhances Entry Solutions Portfolio With Expanded TBS1000C Digital Storage Oscilloscope
Single-pair Ethernet PHY Offers The Industry’s Leading Ultra-low TC10-compliant Sleep Current
Power GaN: Benefits Across The Board
Britishvolt Announces Collaboration With Pininfarina
BYD’s Flagship Han EV Series Officially Goes On Sale
SMART Modular Expands Specialty Memory, Storage And Hybrid Solutions In Western Europe
BMW Establishes Long-term Supply Contract With Northvolt
GaN And SiC Power Semi Market Shifts To Bigger Players
Navitas Partners With Lenovo On GaN Fast Charger
CATL To Supply Batteries To Trailer Dynamics In Europe
Mercedes-Benz EQS To Sport A Range Of 700 Kms
Sonnedix Adds 8.2 MW To Its Italian Portfolio
BMW Group Develops Sustainable Material Cycle For Battery Cells
GLOBALFOUNDRIES Partners With Synopsys, Mentor, And Keysight On Interoperable Process Design Kit (iPDK)

Info
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
×
Logo
×
Register - Step 1

You may choose to subscribe to the Power Electronics World Magazine, the Power Electronics World Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in:
 
X
Info
X
Info
{taasPodcastNotification}